30 September 2013 to 4 October 2013
US/Pacific timezone

Development of Digital Low Level Radio Frequency Controller at SSRF

Not scheduled


Dr Yubin Zhao (SINAP)


Digital low level radio frequency technology has been adopted in the storage ring of SSRF and a controller based on commercial FPGA and DSP board has been developed and operated successfully which helps SSRF to satisfy its specification with beam as high as 300mA. The performance improved controller has been fabricated in house and the stability of amplitude and phase reached 0.076% (RMS) and 0.054 degree (RMS) respectively during the test with 210mA. It is scheduled to be operated before the end of 2013. The recent progress on digital LLRF for FEL will be also reported such as the development activities and test results on the local oscillation generation board and down converter board.

Primary author

Dr Yubin Zhao (SINAP)


Prof. Jianfei Liu (SINAP) Mr Kai Xu (SINAP) Mr Shenjie Zhao (SINAP) Dr Xiang Zheng (SINAP) Mr zhigang Zhang (SINAP)

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