30 September 2013 to 4 October 2013
US/Pacific timezone

FPGA Build Process For Multiple Tasks And Platforms

Not scheduled
Poster

Speaker

Carlos Serrano (LBNL)

Description

Design re-use is in general a good idea, and when it comes to developing FPGA-based systems in a variaty of platforms and for different applications it becomes a necessity. There are several possible approaches to FPGA design, and here we argue for a few key ideas: portabilty, modularity, design re-use, and low time-to-market. In this paper we describe how we are managing some of the challenges involved in different development flow choices, which can favor some of these concepts while affecting others: an example of this is using sophisticated vendor-specific high-level tools and cores, which minimize time-to-market at the expense of portability and design re-use. One alternative is to use a combination of off-the-shelf software management tools along with in-house software to find a good balance among basic concepts of design re-use and portability. The latter approach is the one preferred at LBNL and here we depict its advantages and challenges along with implementation details.

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