30 September 2013 to 4 October 2013
US/Pacific timezone

Session

Session - Other

1 Oct 2013, 16:55

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  1. Dr Stefan Simrock (ITER)
    01/10/2013, 16:55
    Oral
    Every control system has to deal with a large number of input/output devices which offer a similar kind of capabilities. For example, all data acquisition (DAQ) device offer sampling at some rate, which in many cases is configurable. Here, an attempt to standardize such interfaces. The Nominal Device Model (NDM) is a model which proposes to standardize the EPICS interface of analog and digital...
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  2. Philip Varghese (Fermi National Accelerator Laboratory)
    01/10/2013, 17:20
    Oral
    The shrinking silicon geometries in FPGA technology provides the designer today with greatly increased computing and logic resources in a compact low cost package. Application class floating point hard processor cores with a number of high speed peripherals are tightly integrated with FPGA logic on a single chip. The new FPGA architectures come with several high level design and debugging...
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