September 30, 2013 to October 4, 2013
US/Pacific timezone

DSP Tutorial II : Real-life implementation in FPGAs

Oct 2, 2013, 10:40 AM


Mrs Geetha Narayan (BNL)


The tutorial will demonstrate the integrated flow from system design to implementation of real-time DSP applications on FPGAs. The objective is to show developers with limited or no FPGA design experience that they can quickly take a DSP algorithm from concept to verification. Traditional RTL developers can also benefit from this design methodology to cut down on verification time and perform implementation trade-off analysis. The steps taken to validate a simple application using XILINX System Generator with MATLAB / Simulink and hardware-in-loop verification will be shown. An overview of our current designs at BNL using this method and results achieved will be discussed.

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